A down converter active mixer, in 0.25μm CMOS process for ultra wide-band applications

Iji Ayobami, B; Zhu, F; Heimlich, M

A down converter active mixer, in 0.25μm CMOS process for ultra wide-band applications

Iji Ayobami, B Zhu, F

Heimlich, M

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Publication Type:: Conference Proceeding
Citation:: 2012 International Symposium on Communications and Information Technologies, ISCIT 2012, 2012, pp. 28 - 31
Issue Date:: 2012-12-01

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Field	Value	Language
dc.contributor.author	Iji Ayobami, B	en_US
dc.contributor.author	Zhu, F https://orcid.org/0000-0002-5814-394X	en_US
dc.contributor.author	Heimlich, M	en_US
dc.date.issued	2012-12-01	en_US
dc.identifier.citation	2012 International Symposium on Communications and Information Technologies, ISCIT 2012, 2012, pp. 28 - 31	en_US
dc.identifier.isbn	9781467311571	en_US
dc.identifier.uri	http://hdl.handle.net/10453/119553
dc.description.abstract	This paper presents improvement technique on linearity of a CMOS double balance Gilbert cell mixer with considerable high conversion gain at low power consumption. The mixer consists of inductive source degeneration in the transconductance stage providing impedance matching to improve linearity of the mixer. The mixer was designed to operate a Radio Frequency (RF) signal of 4GHz, a Local Oscillator frequency (LO) of 3.75GHz, thus providing an Intermediate Frequency (IF) of 0.25GHz. The circuit presents an Input third order Intercept point (IIP3) of +1dBm. A conversion gain of 10.45dB and a single sideband noise of 8dB over the band width. The DC power consumed by the core mixer is 4.5mW. The proposed active mixer design was made in 0.25μm CMOS Silanna process, suitable for wideband applications. © 2012 IEEE.	en_US
dc.relation.ispartof	2012 International Symposium on Communications and Information Technologies, ISCIT 2012	en_US
dc.relation.isbasedon	10.1109/ISCIT.2012.6380908	en_US
dc.rights	info:eu-repo/semantics/closedAccess
dc.title	A down converter active mixer, in 0.25μm CMOS process for ultra wide-band applications	en_US
dc.type	Conference Proceeding
utslib.for	0906 Electrical and Electronic Engineering	en_US
pubs.embargo.period	Not known	en_US
pubs.organisational-group	/University of Technology Sydney
pubs.organisational-group	/University of Technology Sydney/Faculty of Engineering and Information Technology
pubs.organisational-group	/University of Technology Sydney/Faculty of Engineering and Information Technology/School of Electrical and Data Engineering
pubs.organisational-group	/University of Technology Sydney/Strength - GBDTC - Global Big Data Technologies
utslib.copyright.status	closed_access	*
pubs.publication-status	Published	en_US

Abstract:

This paper presents improvement technique on linearity of a CMOS double balance Gilbert cell mixer with considerable high conversion gain at low power consumption. The mixer consists of inductive source degeneration in the transconductance stage providing impedance matching to improve linearity of the mixer. The mixer was designed to operate a Radio Frequency (RF) signal of 4GHz, a Local Oscillator frequency (LO) of 3.75GHz, thus providing an Intermediate Frequency (IF) of 0.25GHz. The circuit presents an Input third order Intercept point (IIP3) of +1dBm. A conversion gain of 10.45dB and a single sideband noise of 8dB over the band width. The DC power consumed by the core mixer is 4.5mW. The proposed active mixer design was made in 0.25μm CMOS Silanna process, suitable for wideband applications. © 2012 IEEE.

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