Development of Frequency-Fixed All-Pass Filter based Single-Phase Phase-Locked Loop
- Publisher:
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Publication Type:
- Journal Article
- Citation:
- IEEE Journal of Emerging and Selected Topics in Power Electronics, 2022, 10, (1), pp. 506-517
- Issue Date:
- 2022-01-01
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| Filename | Description | Size | |||
|---|---|---|---|---|---|
| Development_of_Frequency-Fixed_All-Pass_Filter-Based_Single-Phase_Phase-Locked_Loop.pdf | Published version | 5.37 MB |
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Phase-locked loops (PLL) are widely used in the synchronization of grid interfaced power converters. One solution is based on orthogonal signal generation (OSG), which requires the grid frequency information for their appropriate operation. This article developed a new solution to achieve the PLL function for single-phase grid interconnection but eradicate additional frequency feedback loops in the traditional architecture of all-pass filter PLL (APF-PLL). Four new topologies are developed along with their small-signal modeling and dynamic analysis. A thorough comparison among them on their dynamic response, steady-state accuracy, implementation, and disturbance rejection capability is carried out. Finally, the best approach of frequency-fixed (FF) APF-PLL is experimentally evaluated with frequency adaptive APF-PLL and FF PLLs belonging to time delay (TD) and second-order generalized integrator (SOGI) families.
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