Circuit Performance Analysis of Analog RF LNA Designed with Negative Capacitance FET

Eslahi, H; Hamilton, TJ; Khandelwal, S

Circuit Performance Analysis of Analog RF LNA Designed with Negative Capacitance FET

Eslahi, H Hamilton, TJ Khandelwal, S

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Publisher:: IEEE
Publication Type:: Conference Proceeding
Citation:: Asia-Pacific Microwave Conference Proceedings, APMC, 2022, 2021-November, pp. 284-286
Issue Date:: 2022-01-01

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Field	Value	Language
dc.contributor.author	Eslahi, H
dc.contributor.author	Hamilton, TJ
dc.contributor.author	Khandelwal, S
dc.date	2021-11-28
dc.date.accessioned	2023-04-12T22:25:02Z
dc.date.available	2023-04-12T22:25:02Z
dc.date.issued	2022-01-01
dc.identifier.citation	Asia-Pacific Microwave Conference Proceedings, APMC, 2022, 2021-November, pp. 284-286
dc.identifier.isbn	9781665437820
dc.identifier.uri	http://hdl.handle.net/10453/169661
dc.description.abstract	In this paper, the benefits of the Negative-Capacitance FET (NCFET) in the design of a Low Noise Amplifier (LNA) are assessed. The effect of gain enhancement due to the Ferroelectric (Fe) layer on the performance of a common-source (CS) LNA is analytically modeled for NCFETs with 14 nm FinFET as the base technology. Simulations show a high gain for the NCFET-based LNA. Such performance in conjunction with the integrability with CMOS technology indicates the potential of NCFET for analog/RF design.
dc.language	en
dc.publisher	IEEE
dc.relation.ispartof	Asia-Pacific Microwave Conference Proceedings, APMC
dc.relation.ispartof	IEEE Asia-Pacific Microwave Conference
dc.relation.ispartofseries	Asia Pacific Microwave Conference-Proceedings
dc.relation.isbasedon	10.1109/APMC52720.2021.9661820
dc.rights	info:eu-repo/semantics/closedAccess
dc.title	Circuit Performance Analysis of Analog RF LNA Designed with Negative Capacitance FET
dc.type	Conference Proceeding
utslib.citation.volume	2021-November
utslib.location.activity	Brisbane, Australia
pubs.organisational-group	/University of Technology Sydney
pubs.organisational-group	/University of Technology Sydney/Faculty of Engineering and Information Technology
pubs.organisational-group	/University of Technology Sydney/Faculty of Engineering and Information Technology/School of Electrical and Data Engineering
utslib.copyright.status	closed_access	*
pubs.consider-herdc	false
dc.date.updated	2023-04-12T22:25:01Z
pubs.finish-date	2021-12-01
pubs.place-of-publication	Piscataway, USA
pubs.publication-status	Published
pubs.start-date	2021-11-28
pubs.volume	2021-November
dc.location	Piscataway, USA

Abstract:

In this paper, the benefits of the Negative-Capacitance FET (NCFET) in the design of a Low Noise Amplifier (LNA) are assessed. The effect of gain enhancement due to the Ferroelectric (Fe) layer on the performance of a common-source (CS) LNA is analytically modeled for NCFETs with 14 nm FinFET as the base technology. Simulations show a high gain for the NCFET-based LNA. Such performance in conjunction with the integrability with CMOS technology indicates the potential of NCFET for analog/RF design.

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http://hdl.handle.net/10453/169661